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Buses and the stored program concept
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The CPU and main memory talk to each other along sets of wires called buses. Knowing which bus does what explains the whole fetch-decode-execute cycle.
The stored program concept
In the von Neumann design, program instructions and data are both stored in main memory (RAM).
The CPU fetches instructions one at a time from memory and executes them.
The clock sends regular pulses; one fetch-decode-execute cycle takes one or more pulses.
The CPU fetches instructions one at a time from memory and executes them.
The clock sends regular pulses; one fetch-decode-execute cycle takes one or more pulses.
Three buses
Buses in the cycle
Fetch: the CPU puts the address of the next instruction on the address bus and sends a 'read' signal on the control bus. The instruction comes back on the data bus.
Decode: the control unit works out what the instruction means.
Execute: the instruction is carried out, for example by the ALU, and the result may be written back to memory along the buses.
Decode: the control unit works out what the instruction means.
Execute: the instruction is carried out, for example by the ALU, and the result may be written back to memory along the buses.
A CPU wants to load the value stored at memory address 200. Describe what happens on each bus.
- Address bus: carries 200 from the CPU to memory.
- Control bus: carries the 'read' signal.
- Data bus: carries the value from memory back to the CPU.
Answer: Address on the address bus, read signal on the control bus, value back on the data bus.
Instructions and data share main memory. The address bus carries addresses one way, the data bus carries data both ways, and the control bus carries signals such as read and write.
The interactive lesson includes the diagrams for this topic.
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